1. Field of the Invention
The present invention relates to a method for manufacturing an SOI wafer, more specifically, it relates to an improvement of a method for manufacturing an SOI wafer in which an active layer wafer and a support wafer are bonded.
This application claims priority from Japanese Patent Application No. 2004-350285, filed on Dec. 2, 2004, the content of which is incorporated herein by reference.
2. Background Art
Compared with conventional silicon wafers, SOI (Silicon On Insulator) wafers having an SOI layer have advantages such as providing a separation between elements and a reduction in parasitic capacitance between elements and a substrate, and having the capability to form a three-dimensional configuration; thereby the SOI wafers are used for high speed, low power consumption LSI circuits. An examples of one of the methods for manufacturing an SOI wafer is a bonding method in which an oxide film is formed in at least one of two silicon wafers and the silicon wafers are bonded, and then the bonded wafer is ground and polished so as to form an SOI layer.
Regarding the bonding method, the SOI wafer may be manufactured, for example, as follows as described in Patent Document 1. At first, an active layer wafer of which one surface is mirror-polished and a support wafer of which one surface is mirror-polished are prepared. Next, an insulating film (an oxide film) having a predetermined thickness is formed in a surface (a mirror-polished surface) of the active layer wafer. And then, the active layer wafer and the support wafer are bonded together to form a bonded wafer such that the surface (the mirror-polished surface) in which the oxide film is formed and the surface (the mirror surface) of the support wafer are used as bonding surfaces.
After the bonding, the bonded wafer is subjected to a heat treatment so as to enhance the bonding strength between the active layer wafer and the support wafer. After this, a portion of the active layer wafer is ground and polished; thereby, an SOI wafer having an SOI layer of a predetermined thickness can be obtained.
Here, as described above, in the bonding method, the heat treatment is conducted so as to enhance the bonding strength between the active layer wafer and the support wafer, and such a heat treatment is carried out, for example, in an oxygen atmosphere. However, during the heat treatment for bonding enhancement, metal impurities existing in an atmosphere may contaminate the bonded wafer. The metal impurities in this case are, for example, Fe, Cu, Ni, and the like.
As a result, metal impurities exist in the entire surface of the bonded wafer. Thus, in the bonded wafer, the metal impurities also exist in the SOI layer which becomes an active layer after a process of grinding and polishing a portion of the active layer wafer. Therefore, the SOI wafer having the SOI layer including metal impurities does not satisfy electrical characteristics in a device process.
(Patent Document 1) Japanese Unexamined Patent Application, First Publication No. 2001-44398